CEVA's CEVA-X DSP to power Samsung's 3G mobile phones
April 16, 2004
CEVA, the licensor of Digital Signal Processor (DSP) cores and
communications solutions to the semiconductor industry, announced
that Samsung Electronics has licensed the CEVA-X1620 DSP core to
power Samsung's next generation 3G multimedia handsets.
CEVA-X1620 DSP core is the first implementation of the CEVA-X architecture
that was launched in December 2003. CEVA-X is a scalable VLIW-SIMD
DSP architecture delivering breakthrough performance, at low power
consumption. Uniquely, the CEVA-X is designed as a multipurpose
architecture allowing it be deployed efficiently in a broad range
of markets such as 2.5G/3G multimedia phones, PDAs, Digital Cameras
and Camcorder, DTV, HD-DVD and more. CEVA-X enables licensees to
efficiently develop software using high-level languages such C and
C++ allowing re-usability and fast time to market.
Samsung has licensed the CEVA-X1620 dual MAC 16-bit, fully synthesizable
DSP core for cellular and applications processing for Samsung's
next generation 3G cellular phones. CEVA and Samsung have had a
long-standing partnership in DSP with Samsung having previously
licensed and deployed the CEVA-TeakLite and CEVA-Teak DSP cores.
"CEVA-X is an outstanding technology delivering high performance
and scalability to DSP which will enable Samsung handsets with new
levels of communication and multimedia capabilities," said KyungHo
Kim, Vice President of Samsung. "Samsung and CEVA have successfully
partnered in the past in DSP technology, and we are pleased to be
the lead partner for the very exciting CEVA-X DSP technology."
CEVA-X1620 is specifically designed for cost driven, low power
applications where convergence of communication and multimedia is
a necessity. Independent benchmarks by Berkeley Design Technology
(BDTI), have demonstrated that the CEVA-X1620 will be faster than
all DSPs in its class.
CEVA-X1620 Features
-- 16-bit Fixed-Point Dual MAC architecture
-- Unique mix of Very Long Instruction Word (VLIW) and Single Instruction
Multiple Data (SIMD)
-- High frequency - up to 450 Mhz @ 0.13u (worst case)
-- High-DSP performance. For example: 2 cycle FFT butterfly and
Single cycle Viterbi Add-compare-select
-- Up to 8 instructions in parallel
-- Variable instruction width (16 or 32-bit) and variable instruction
packets
-- Ultra low dynamic power consumption achieved by a built in mechanism
which shuts off any unnecessary logic
-- Enable Customer Extensions
-- Highly efficient C/C++ Compiler
-- Complete software and hardware development environment
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