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New Baseband ASIC To Cut Power Consumption of Dual-Mode Terminals

February 23, 2003

Innovics Wireless today announced a new diversity processing solution for next-generation wireless systems, which will significantly reduce the power consumed by dual mode 2.5/3G terminals. By enabling a significant increase in the rate of data download, the Innovics IW7520 reduces the time spent downloading and thereby increases terminal battery life.

Implemented in a small silicon area, the Innovics IW7520 device has a low-power architecture that is compliant with 3GPP UMTS (WCDMA), but also compatible with GPRS and GSM standards. This provides the terminal user with access to existing 2G and 2.5G services as well as 3G networks.

Like Innovics' existing 3G-only solution, the new IW7520 hardware is capable of offering up to 2Mbit/s downloads and 768kbit/s uploads via a 3G network. The new device also supports hard hand-off between UMTS FDD and GSM cells, and complies with GSM Phase 2+ and GPRS multi-slot class 12 (5 slots).

The IW7520 offers a full range of GSM standard vocoders, SMS services, EMS messaging and circuit-switched and packet switched data - including fax.

The IW7520 uses Innovics' patented terminal-based diversity processing technology to increase the average data rate available per user in a cellular system. Despite its small size, this low-cost, multi-mode, multi-band baseband processor contains approximately 3 times the processing power of other solutions.

In a typical 3G mobile terminal, diversity processing can increase the signal to noise ratio (SNR) at the mobile terminal by 7dB on average. This gain enables reliable broadband data connections at the promised data rates (384kbit/s to 2Mbit/s) throughout the entire 3G cell. The effective coverage of a cell is dramatically extended and capacity can be increased by up to a factor of four, reducing the need for 3G cells and infrastructure costs by up to 50%.

Power-efficiency in the IW7520 is enhanced by the use of clock gating and an intelligent adaptive algorithm, which controls the power mode (active/sleep/shut-down) of different processing blocks according to prevailing channel conditions and the required quality of service. The device also uses dynamic voltage scaling (DVS) - varying the supply voltage and clock frequency to minimise power consumption.

 


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