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AWR announces CDMA2000 test bench for VSS
June 13, 2005
Applied Wave Research (AWR), a provider of high-frequency electronic design automation (EDA) tools, announced the release of a CDMA2000 test bench for the company's Visual System Simulator (VSS) design suite. The new test bench is designed for radio-frequency (RF) system engineers who need to evaluate the impact of RF link impairments on frame error rate (FER), bit error rate (BER), symbol error rate (SER), and other metrics.
The VSS CDMA2000 test bench modular design and intuitive interface offers an unprecedented flexibility in configuration and ease-of-use. This enables RF systems groups to be self-sufficient by providing a "canvas" to quickly and easily make changes and/or add functionality. The VSS design suite offers a rich set of behavioral RF models and integration with AWR's Analog Office circuit design software and popular industry instrumentation. This provides engineers with a unique, single simulation environment that can be used to efficiently analyze RF impairments without having to switch between tools.
"The VSS CDMA2000 test bench is the latest software innovation in AWR's continuing commitment to provide engineers with effective, easy-to-use, integrated tools for the generation of the complex modulated signals needed to design next-generation communications products," said Joel Kirshman, AWR market segment manager for system simulation.
The VSS test bench consists of transmit and receive blocks and supports variable frame sizes, data rates, and multiple channels including fundamental and supplemental traffic, pilot, as well as an orthogonal channel noise simulator (OCNS). All the bit-level functions, framing, cyclical redundancy code (CRC), forward-error correction (FEC), interleaving, Walsh and quadrature spreading, and modulation for forward and reverse link operation are included.
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