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Freescale unveil four next-generation PowerQUICC III processors
September 28, 2004
Freescale Semiconductor has achieved another milestone in the evolution of its high-performance PowerQUICC III architecture containing a PowerPC core. Freescale unveiled four next-generation PowerQUICC III processors with advanced features that address the enterprise networking, telecom transmission and switching, 3G wireless infrastructure, storage and high-end imaging markets. Based on the e500 PowerPC system-on-chip (SoC) platform, the four PowerQUICC III processors are the most powerful PowerQUICC devices available, delivering gigahertz-class performance and a choice of high-speed interconnects for today's most demanding applications.
The four next-generation PowerQUICC III processors are the first PowerQUICC devices based on Freescale's 90 nanometer (nm) silicon-on-insulator (SOI) copper interconnect process technology, which enables processors to deliver high performance with low power dissipation. The 90 nm processors are designed to deliver a significant increase in performance over current 130 nm PowerQUICC III devices. The initial product versions are planned to operate at up to 1.33 GHz, with headroom to scale to 1.5 GHz.
"The demand for high-performance embedded processors that offer increased levels of integration to target certain end markets will continue to rise as OEMs search for optimized solutions to address their more advanced design requirements," said Sean Lavey, a semiconductor analyst at IDC. "These PowerQUICC III processors should find strong traction in next-generation systems as Freescale leverages an already solid position shipping PowerQUICC products into numerous markets, especially in communications and storage."
All four 90 nm PowerQUICC III processors incorporate an enhanced version of the e500 core designed to operate at up to 1.5 GHz at 90 nm. Initial offerings of this core are planned to scale from 800 MHz to 1.33 GHz. The enhanced e500 core connects to an integrated 512KB Level 2 (L2) cache, twice the size of the L2 cache available in current 130 nm PowerQUICC III products. The L2 cache is 8-way set associative and can be configured as cache or SRAM. The internal buses operate at up to double the rate of the previous 130 nm PowerQUICC III versions. The integrated DDR memory controller supports DDR SDRAM at up to 166 MHz (333 MHz data rate) and DDR2 SDRAM at up to 333 MHz (up to 667 MHz data rate, with initial offerings at 533 MHz data rate).
The four 90 nm PowerQUICC III processors include:
MPC8548E networking/telecom processor - Key features include 512KB L2 cache, integrated security engine, 64-bit DDR1/2 scaling to 667 MHz data rate, dual 32-bit PCI or 64-bit PCI-X, 4-bit Serial RapidIO fabric technology and 4-bit PCI-Express (or single 8-bit PCI Express 1.0a), local bus IO interfaces, and four Gigabit Ethernet interfaces. The combination of these features makes this device an optimal communications processing solution for Ethernet-only or RapidIO interworking applications, such as enterprise networking, telecom transmission and switching and 3G wireless basestations. The security engine includes Kasumi algorithm acceleration, making the MPC8548E an ideal choice for enhancing security protocol processing in 2.5G and 3G wireless network infrastructure.
MPC8547E storage processor - Key features include 512KB L2 cache, integrated security acceleration with Exclusive Or (XOR) capability, support for battery-backed 64-bit DDR1/2 scaling to 667 MHz data rate, 64-bit PCI-X, 8-bit PCI Express and four Gigabit Ethernet interfaces. The device's XOR acceleration enhances system performance by offloading the compute-intensive parity checks in small-medium business (SMB) and enterprise redundant array of inexpensive disks (RAID) storage applications.
MPC8545E imaging processor - Key features include 512KB L2 cache, 64-bit DDR1/2 scaling up to 533 MHz data rate, integrated security, dual 32-bit PCI/single 64-bit PCI, 4-bit PCI Express and two Gigabit Ethernet interfaces. The MPC8545E also offers double precision floating point, a capability that makes this device a high-performance processing solution for a wide range of imaging applications.
MPC8543E general-purpose control processor - Key features include 256KB L2 cache, integrated security, 64-bit DDR1/2 scaling up to 400 MHz data rate, 32-bit PCI, 4-bit Serial RapidIO or 4-bit PCI Express, and two Gigabit Ethernet interfaces. With clock frequencies scaling from 800 MHz to 1 GHz, this cost-effective device is ideally suited for a wide range of general-purpose embedded control applications, such as robotics, discrete manufacturing and process manufacturing control.
The security engine integrated into each of the 90 nm PowerQUICC III devices accelerates a wide range of algorithms and modes, including DES/3DES, AES, ARC-4, Kasumi, MD5, SHA1/2, RSA and Elliptic Curve and also provides a hardware random number generator. The security engine enables the PowerQUICC III processors to offer up to 1 Gbps throughput for widely used commercial security protocols, such as IPSec, SSL/TLS and 3GPP.
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